IO based embedded processor clock speed control
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United States of America Patent
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Feb 22, 2005
Grant Date -
N/A
app pub date -
Oct 2, 2001
filing date -
Oct 2, 2001
priority date (Note) -
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Abstract
An input/output controller that allows independent and configurable reduction of clock speeds to its embedded processors when they are not in use to save average power consumption. The processor clock speeds are restored when new input/output requests are received.
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