Method for manufacturing gate spacer for self-aligned contact

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United States of America Patent

PATENT NO 6861327
APP PUB NO 20020115249A1
SERIAL NO

10044799

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Abstract

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A method for manufacturing a gate spacer for self-aligned contacts is provided. A gate stack is formed on a semiconductor substrate. A conformal dielectric layer is then formed over the gate stack. An etch-stop material layer, e.g., a photoresist layer, is formed over the conformal dielectric layer. Next, an upper portion of the etch stop material layer is removed to expose an upper portion of the conformal dielectric layer by techniques such as etching back. Subsequently, the exposed conformal dielectric layer is etched back using the remaining etch-stop material layer as an etch stopper. The remaining etch-stop material layer is removed and the etched-back conformal dielectric layer is again etched back to form a gate spacer.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Seo, June Gyeonggi-do, KR 1 1
Sing, Jong-Heui Gyeonggi-do, KR 1 1

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