Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition

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United States of America Patent

PATENT NO 6861334
APP PUB NO 20030015764A1
SERIAL NO

09887199

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Abstract

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A dielectric film is formed by atomic layer deposition to conformally fill a narrow, deep trench for device isolation. The method of the illustrated embodiments includes alternately pulsing vapor-phase reactants in a string of cycles, where each cycle deposits no more than about a monolayer of material, capable of completely filling high aspect ratio trenches. Additionally, the trench-fill material composition can be tailored by processes described herein, particularly to match the coefficient of thermal expansion (CTE) to that of the surrounding substrate within which the trench is formed. Mixed phases of mullite and silica have been found to meet the goals of device isolation and matched CTE. The described process includes mixing atomic layer deposition cycles of aluminum oxide and silicon oxide in ratios selected to achieve the desired composition of the isolation material, namely on the order of 30% alumina and 70% silicon oxide by weight.

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Patent Owner(s)

Patent OwnerAddress
ASM INTERNATIONAL N VVERSTERKERSTRAAT 8 ALMERE 1322 AP

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Granneman, Ernst H A Hilversum, NL 26 2611
Raaijmakers, Ivo Bilthoven, NL 113 13612
Soininen, Pekka T Helsinki, FI 21 2647

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