Importance

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Abstract

A semiconductor package device has a circuit board with upper and lower conductive metal patterns respectively formed on upper and lower surfaces of the circuit board, a cavity centrally formed in the lower surface, and an opening through the upper surface that is connected to the cavity. A semiconductor chip is attached to the lower surface of the circuit board by an adhesive so that bonding pads of the chip are exposed through the opening. The semiconductor chip is disposed entirely within the cavity of the circuit board. Plating layers formed on side surfaces of the circuit board are electrically interconnected to the upper and lower metal patterns. An encapsulant protects the electrical interconnection parts of the semiconductor device package. When used in a stack package, electrical connection between an upper semiconductor device package and a lower semiconductor device package of the stack package is accomplished by bonding the lower metal pattern of the upper semiconductor device package and the upper metal pattern of the lower semiconductor device package with a conductive adhesive. A lowermost semiconductor device package of the stack package is electrically connected to an external apparatus via the lower metal pattern of the lowermost semiconductor package.

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First Claim