Method and apparatus for eliminating the software generated ready-signal to hardware devices that are not part of the memory coherency domain
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United States of America Patent
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Mar 1, 2005
Grant Date -
Jul 3, 2003
app pub date -
Dec 28, 2001
filing date -
Dec 28, 2001
priority date (Note) -
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Abstract
The specification discloses a method and related system that allows hardware devices to participate in the coherency domain of a computer system. More particularly, hardware devices such as network interface cards, audio cards, input/output cards, and the like, are allowed to participate on at least a limited basis in the coherency domain by having cache memory that duplicates a FIFO buffer in main memory used to exchange information between software and the hardware. To exchange information, software writes to the FIFO buffer which invalidates the data in the cache-type memory of the hardware device, and the invalidation message acts to notify the hardware device of the availability of information in the FIFO buffer.
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