First tier cache memory preventing stale data storage
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United States of America Patent
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Mar 1, 2005
Issued Date -
N/A
app pub date -
Mar 25, 2002
filing date -
Jul 6, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
An apparatus includes a compute engine coupled to a first tier cache memory including a data array. The first tier cache receives memory access requests from the compute engine. A second tier cache memory is coupled to the first tier cache to receive memory access requests for memory locations not owned by the first tier cache. To avoid stale data storage, the first tier cache does not load the data array with data returned by the second tier cache under the following condition--the second tier cache returns the data in response to a cacheable load operation from a memory location after the compute engine issues a subsequent store operation to the same memory location.
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