Nestless plunge mechanism for semiconductor testing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6864678
APP PUB NO 20040051543A1
SERIAL NO

10621955

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Abstract

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A plunge mechanism includes an elongated, hollow probe that vacuum grips at its free end, and carries, without relative movement therebetween, an electronic device under test (DUT) to a test site on a board, or socket, of a test circuit. A reciprocating drive plunges the DUT in a first direction to a test site where the leads of the DUT each align with and connect electrically to an associated electrical contact. The drive uses a high-precision linear slide to maintain the alignment of the probe with the test site during the plunging movement. The probe materials and dimensions provide sufficient stiffness to resist a shift of the IC out of alignment due to the weight of the gripped DUT, vibrations, or contact forces between the DUT and the board or socket. The diameter of the probe is preferably smaller than the x-y dimensions of the DUT. No DUT alignment members are used on the test board or socket that limit the physical proximity of the DUT to its preferred test position with respect to the test circuit.

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Patent Owner(s)

Patent OwnerAddress
DELTA DESIGN INC12367 CROSTHWAITE CIRCLE POWAY CA 92064

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Heald, John A Billerica, MA 1 1
Hennessey, Robert East Walpole, MA 2 6
Ryder, Charlie Walpole, MA 1 1

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