Methods of making microelectronic packages including electrically and/or thermally conductive element

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6873039
APP PUB NO 20040157362A1
SERIAL NO

10607289

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of manufacturing a plurality of microelectronic packages including electrically and/or thermally conductive elements. The method includes providing a support structure having a plurality of protrusions and depressions extending outwardly from the support. A conductive element is then mated to the support structure in a male-to-female relationship. The depressions formed in the support structure and conductive element are used to house a microelectronic element such as a semiconductor chip. A substrate is provided so as to cover substantially each depression located in the conductive element. Leads interconnect contacts to the chip to terminals on the substrate. A curable encapsulant material may be deposited into the depression so as to protect and support the leads and the microelectronic element. Additionally, the curable encapsulant material forms part of the exterior of a single resulting chip package once the assembly is diced and cut into individual packages.

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Patent Owner(s)

Patent OwnerAddress
TESSERA INC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beroz, Masud Livermore, CA 103 3246
Kong, Bob Wen Zhong Newark, CA 2 44
Warner, Michael San Jose, CA 57 2058

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