Stack package using flexible double wiring substrate
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United States of America Patent
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Apr 5, 2005
Grant Date -
Apr 10, 2003
app pub date -
Jul 23, 2002
filing date -
Oct 10, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A Chip Scale Package (CSP) type unit package including a semiconductor chip and a double wiring substrate, the double wiring substrate including an adhesive and a flexible tape having an upper surface with a first wiring pattern, a lower surface with a second wiring pattern and a plurality of vias electrically connecting portions of the first and second wiring patterns. Additionally, the unit package may be stacked on a conventional base package or on another unit package, where stacked packages are electrically interconnected.
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