Side wall passivation films for damascene cu/low k electronic devices
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United States of America Patent
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Apr 12, 2005
Grant Date -
May 13, 2004
app pub date -
Nov 12, 2002
filing date -
Nov 12, 2002
priority date (Note) -
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Abstract
Methods and apparatus for protecting the dielectric layer sidewalls of openings, such as vias and trenches, in semiconductor substrates are provided. A pre-liner and a liner are deposited over the sidewalls of the openings as part of integrated processing sequences that either do not remove the photoresist until subsequent processing or remove the photoresist with a plasma etch that does not contaminate the sidewalls of the openings.
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