Semiconductor package including low temperature co-fired ceramic substrate
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United States of America Patent
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Apr 12, 2005
Grant Date -
N/A
app pub date -
May 1, 2003
filing date -
May 1, 2003
priority date (Note) -
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Abstract
A semiconductor package comprising a low temperature co-fired ceramic substrate defining opposed top and bottom surfaces. The substrate comprises at least two stacked ceramic layers and electrically conductive patterns which extend between the layers and along the top surface of the substrate. Mounted to the top surface of the substrate and electrically connected to the conductive patterns is at least one semiconductor die. A plurality of leads extend at least partially about the substrate in spaced relation thereto. Each of the leads defines opposed top and bottom surfaces, the semiconductor die being electrically connected to at least one of the leads. A package body at least partially encapsulates the substrate, the semiconductor die and the leads such that at least a portion of the bottom surface of each of the leads is exposed in the package body.
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