
US Patent No: 6,879,654
Number of patents in Portfolio can not be more than 2000
Non-integer frequency divider circuit
Stats
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Apr 12, 2005
Issued date -
Apr 25, 2003
filing date -
10/249,629
serial no -
Expired
status
Importance
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Abstract
A non-integer frequency divider is disclosed. The non-integer frequency divider circuit includes several base stages connected to each other. The non-integer frequency divider circuit also includes a clocking circuit for passing an enable bit from one of the base stages to another such that only one of the base stages is enabled at any give time. The enable bit has a pulse width of one clock cycle. The outputs from the base stages are grouped together by an OR gate to generate a single output that is a fraction of an input clock signal.
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First Claim
Related Publications
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 6,121,801 Non-integer clock divider | 12 | 1997 | |
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| 4,348,640 Divide by three clock divider with symmertical output | 17 | 1980 | |
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| 5,774,511 Processor clock circuit | 11 | 1996 | |
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| 6,157,694 Fractional frequency divider | 45 | 1998 | |
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| 4,477,918 Multiple synchronous counters with ripple read | 10 | 1981 | |
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| 5,448,191 Frequency synthesizer using noninteger division and phase selection | 37 | 1994 | |
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| 4,975,931 High speed programmable divider | 21 | 1988 | |
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| 4,295,158 Digital frequency divider | 10 | 1979 | |
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Oct 12, 2016 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |