Non-integer frequency divider circuit
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United States of America Patent
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Apr 12, 2005
Grant Date -
Oct 28, 2004
app pub date -
Apr 25, 2003
filing date -
Apr 25, 2003
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A non-integer frequency divider is disclosed. The non-integer frequency divider circuit includes several base stages connected to each other. The non-integer frequency divider circuit also includes a clocking circuit for passing an enable bit from one of the base stages to another such that only one of the base stages is enabled at any give time. The enable bit has a pulse width of one clock cycle. The outputs from the base stages are grouped together by an OR gate to generate a single output that is a fraction of an input clock signal.
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