
US Patent No: 6,888,750
Number of patents in Portfolio can not be more than 2000
Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication
Stats
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May 3, 2005
Issued date -
Aug 13, 2001
filing date -
09/927,642
serial no -
In Force
status
Importance
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Abstract
A nonvolatile memory array is provided. The array includes an array of nonvolatile memory devices, at least one driver circuit, and a substrate. The at least one driver circuit is not located in a bulk monocrystalline silicon substrate. The at least one driver circuit may be located in a silicon on insulator substrate or in a compound semiconductor substrate.
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First Claim
Related Publications
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International Classification(s)
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- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 4,811,082 High performance integrated circuit packaging structure | 259 | 1986 | |
| 5,160,987 Three-dimensional semiconductor structures formed from planar layers | 106 | 1991 | |
| 5,334,880 Low voltage programmable storage element | 84 | 1991 | |
| 5,202,754 Three-dimensional multichip packages and methods of fabrication | 132 | 1991 | |
| 5,426,566 Multichip integrated circuit packages and systems | 103 | 1993 | |
| 5,471,090 Electronic structures having a joining geometry providing reduced capacitive loading | 44 | 1993 | |
| 5,561,622 Integrated memory cube structure | 135 | 1993 | |
| 5,703,747 Multichip semiconductor structures with interchip electrostatic discharge protection, and fabrication methods therefore | 50 | 1995 | |
| 5,468,663 Method of fabricating three-dimensional direct-write EEPROM arrays | 75 | 1995 | |
| 5,781,031 Programmable logic array | 119 | 1995 | |
| 5,780,925 Lead frame package for electronic devices | 111 | 1995 | |
| 6,291,858 Multistack 3-dimensional high density semiconductor device and method for fabrication | 47 | 2000 | |
| 6,355,501 Three-dimensional chip stacking assembly | 132 | 2000 | |
|
|
|||
| 5,266,912 Inherently impedance matched multiple integrated circuit module | 178 | 1992 | |
| 5,696,031 Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice | 127 | 1996 | |
| 5,973,356 Ultra high density flash memory | 203 | 1997 | |
| 5,978,258 MOS diode for use in a non-volatile memory cell background | 52 | 1998 | |
| 6,281,042 Structure and method for a high performance electronic packaging assembly | 189 | 1998 | |
| 6,351,028 Multiple die stack apparatus employing T-shaped interposer elements | 114 | 1999 | |
| 6,314,013 Stacked integrated circuits | 87 | 2000 | |
|
|
|||
| 4,823,181 Programmable low impedance anti-fuse element | 277 | 1986 | |
| 4,881,114 Selectively formable vertical diode circuit element | 296 | 1986 | |
| 4,876,220 Method of making programmable low impedance interconnect diode element | 396 | 1987 | |
| 4,899,205 Electrically-programmable low-impedance anti-fuse element | 211 | 1987 | |
| 4,943,538 Programmable low impedance anti-fuse element | 191 | 1988 | |
| 5,070,384 Electrically programmable antifuse element incorporating a dielectric and amorphous silicon interlayer | 212 | 1990 | |
|
|
|||
| 4,281,397 Virtual ground MOS EPROM or ROM matrix | 134 | 1979 | |
| 4,507,757 Avalanche fuse element in programmable memory | 128 | 1982 | |
| 4,535,424 Solid state three dimensional semiconductor memory array | 37 | 1982 | |
| 5,306,935 Method of forming a nonvolatile stacked memory | 79 | 1992 | |
| 5,379,255 Three dimensional famos memory devices and methods of fabricating | 84 | 1992 | |
| 5,883,409 EEPROM with split gate source side injection | 121 | 1997 | |
|
|
|||
| 5,825,046 Composite memory material comprising a mixture of phase-change memory material and dielectric material | 298 | 1996 | |
| 6,087,674 Memory element with memory material comprising phase-change material and dielectric material | 489 | 1998 | |
| 6,141,241 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same | 266 | 1999 | |
| 6,075,719 Method of programming phase-change memory element | 84 | 1999 | |
|
|
|||
| 4,499,557 Programmable cell for use in programmable electronic arrays | 419 | 1981 | |
| 4,677,742 Electronic matrix arrays and method for making the same | 156 | 1983 | |
| 4,646,266 Programmable semiconductor structures and methods for using the same | 413 | 1984 | |
|
|
|||
| 4,203,158 Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same | 226 | 1978 | |
| 4,272,880 MOS/SOS Process | 135 | 1979 | |
| 4,543,594 Fusible link employing capacitor structure | 172 | 1985 | |
|
|
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| 5,422,435 Stacked multi-chip modules and method of manufacturing | 284 | 1992 | |
| 5,502,289 Stacked multi-chip modules and method of manufacturing | 188 | 1995 | |
| 5,495,398 Stacked multi-chip modules and method of manufacturing | 216 | 1995 | |
|
|
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| 5,191,551 Non-volatile semiconductor memory device with transistor paralleling floating gate transistor | 16 | 1991 | |
| 5,321,286 Non-volatile semiconductor memory device having thin film memory transistors stacked over associated selecting transistors | 50 | 1992 | |
| 5,517,044 Non-volatile semiconductor memory device having thin film transistors equipped with floating gates | 52 | 1994 | |
|
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| 5,391,518 Method of making a field programmable read only memory (ROM) cell using an amorphous silicon fuse with buried contact polysilicon and metal electrodes | 67 | 1993 | |
| 5,427,979 Method for making multi-level antifuse structure | 83 | 1993 | |
| 6,057,598 Face on face flip chip integration | 128 | 1997 | |
|
|
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| 5,441,907 Process for manufacturing a plug-diode mask ROM | 92 | 1994 | |
| 5,654,220 Method of making a stacked 3D integrated circuit structure | 93 | 1995 | |
| 5,985,693 High density three-dimensional IC interconnection | 95 | 1997 | |
|
|
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| 5,481,133 Three-dimensional multichip package | 177 | 1994 | |
| 5,693,552 Method for fabricating read-only memory device with a three-dimensional memory cell structure | 42 | 1996 | |
| 5,737,259 Method of decoding a diode type read only memory | 59 | 1996 | |
|
|
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| 5,535,156 Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same | 91 | 1994 | |
| 5,745,407 Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same | 112 | 1996 | |
|
|
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| 5,915,167 Three dimensional structure memory | 382 | 1997 | |
| 6,133,640 Three-dimensional structure memory | 119 | 1997 | |
|
|
|||
| 4,489,478 Process for producing a three-dimensional semiconductor device | 131 | 1982 | |
| 4,922,319 Semiconductor programmable memory device | 90 | 1989 | |
|
|
|||
| 5,001,539 Multiple layer static random access memory device | 55 | 1989 | |
| 5,453,952 Semiconductor device having peripheral circuit formed of TFT (thin film transistor) | 45 | 1992 | |
|
|
|||
| 5,612,570 Chip stack and method of making same | 172 | 1995 | |
| 5,801,437 Three-dimensional warp-resistant integrated circuit module method and apparatus | 81 | 1995 | |
|
|
|||
| 6,337,521 Semiconductor device and a method of manufacturing the same | 44 | 2000 | |
| 6,353,265 Semiconductor device | 72 | 2001 | |
|
|
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| 5,751,012 Polysilicon pillar diode for use in a non-volatile memory cell | 414 | 1995 | |
| 5,969,380 Three dimensional ferroelectric memory | 64 | 1996 | |
|
|
|||
| 5,768,192 Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping | 721 | 1996 | |
| 5,966,603 NROM fabrication method with a periphery portion | 255 | 1997 | |
|
|
|||
| 6,028,326 Thin film transistor including a catalytic element for promoting crystallization of a semiconductor film | 14 | 1997 | |
| 6,072,193 Thin-film transistor and semiconductor device using thin-film transistors | 84 | 1998 | |
|
|
|||
| 4,498,226 Method for manufacturing three-dimensional semiconductor device by sequential beam epitaxy | 95 | 1982 | |
| 4,500,905 Stacked semiconductor device with sloping sides | 142 | 1982 | |
|
|
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| 4,203,123 Thin film memory device employing amorphous semiconductor materials | 181 | 1977 | |
| 4,442,507 Electrically programmable read-only memory stacked above a semiconductor substrate | 194 | 1981 | |
|
|
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| 5,976,953 Three dimensional processor using transferred thin film circuits | 99 | 1997 | |
|
|
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| 6,072,234 Stack of equal layer neo-chips containing encapsulated IC chips of different sizes | 52 | 1999 | |
|
|
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| 5,283,468 Electric circuit apparatus | 51 | 1993 | |
|
|
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| 4,630,096 High density IC module assembly | 74 | 1984 | |
|
|
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| 4,820,657 Method for altering characteristics of junction semiconductor devices | 49 | 1987 | |
|
|
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| 5,391,907 Semiconductor device with buried inverse T-type field region | 33 | 1994 | |
|
|
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| 5,585,675 Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs | 120 | 1994 | |
|
|
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| 4,672,577 Three-dimensional integrated circuit with optically coupled shared memories | 42 | 1985 | |
|
|
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| 5,523,622 Semiconductor integrated device having parallel signal lines | 100 | 1995 | |
|
|
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| 4,692,994 Process for manufacturing semiconductor devices containing microbridges | 36 | 1986 | |
|
|
|||
| 4,686,758 Three-dimensional CMOS using selective epitaxial growth | 53 | 1986 | |
|
|
|||
| 5,523,628 Apparatus and method for protecting metal bumped integrated circuit chips during processing and for providing mechanical support to interconnected chips | 166 | 1994 | |
|
|
|||
| 6,137,718 Method for operating a non-volatile memory cell arrangement | 87 | 1999 | |
|
|
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| 4,420,766 Reversibly programmable polycrystalline silicon memory element | 99 | 1981 | |
|
|
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| 2001/0054,759 Semiconductor device | 35 | 2001 | |
|
|
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| 4,811,114 Image reading apparatus | 29 | 1987 | |
|
|
|||
| 5,455,445 Multi-level semiconductor structures having environmentally isolated elements | 114 | 1994 | |
|
|
|||
| 6,197,641 Process for fabricating vertical transistors | 76 | 1999 | |
|
|
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| 5,398,200 Vertically formed semiconductor random access memory device | 86 | 1994 | |
|
|
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| 5,191,405 Three-dimensional stacked LSI | 143 | 1989 | |
|
|
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| 5,468,997 Integrated circuit package having a multilayered wiring portion formed on an insulating substrate | 56 | 1994 | |
|
|
|||
| 5,747,846 Programmable non-volatile memory cell | 19 | 1994 | |
|
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| 4,710,798 Integrated circuit chip package | 120 | 1985 | |
|
|
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| 5,283,458 Temperature stable semiconductor bulk acoustic resonator | 32 | 1992 | |
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|
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| 4,419,741 Read only memory (ROM) having high density memory array with on pitch decoder circuitry | 57 | 1981 | |
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|
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| 6,034,882 Vertically stacked field programmable nonvolatile memory and method of fabrication | 736 | 1998 | |
|
|
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| 6,087,722 Multi-chip package | 160 | 1999 | |
|
|
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| 6,185,122 Vertically stacked field programmable nonvolatile memory and method of fabrication | 458 | 1999 | |
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| 5,776,810 Method for forming EEPROM with split gate source side injection | 85 | 1994 | |
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|
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| 5,311,039 PROM and ROM memory cells | 85 | 1991 | |
|
|
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| 6,066,547 Thin-film transistor polycrystalline film formation by nickel induced, rapid thermal annealing method | 44 | 1997 | |
|
|
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| 4,569,121 Method of fabricating a programmable read-only memory cell incorporating an antifuse utilizing deposition of amorphous semiconductor layer | 130 | 1983 | |
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| 6,307,257 Dual-chip integrated circuit package with a chip-die pad formed from leadframe leads | 59 | 1999 | |
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|
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| 5,675,547 One time programmable read only memory programmed by destruction of insulating layer | 86 | 1996 | |
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| 5,552,963 Bus communication system for stacked high density integrated circuit packages | 84 | 1995 | |
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| 5,536,968 Polysilicon fuse array structure for integrated circuits | 84 | 1994 | |
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| 5,463,244 Antifuse programmable element using ferroelectric material | 65 | 1994 | |
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| 5,581,498 Stack of IC chips in lieu of single IC chip | 240 | 1994 | |
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| 6,322,903 Package of integrated circuits and vertical integration | 172 | 1999 | |
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| 4,494,135 Programmable read only memory cell having an electrically destructible programmation element integrally formed with a junction diode | 81 | 1982 | |
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| 5,434,745 Stacked silicon die carrier assembly | 173 | 1994 | |
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| 5,070,383 Programmable memory matrix employing voltage-variable resistors | 69 | 1989 | |
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| 5,089,862 Monocrystalline three-dimensional integrated circuit | 60 | 1989 | |
| 5,835,396 Three-dimensional read-only memory | 330 | 1996 | |
| 6,208,545 Three dimensional structure memory | 148 | 1997 | |
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Nov 3, 2016 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |