Memory device supporting a dynamically configurable core organization
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United States of America Patent
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May 3, 2005
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N/A
app pub date -
Nov 22, 2002
filing date -
Feb 28, 2001
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Abstract
Described is a memory system in which the memory core organization changes with device width. The number of physical memory banks accessed reduces with device width, resulting in reduced power usage for relatively narrow memory configurations. Increasing the number of logic memory banks for narrow memory widths reduces the likelihood of bank conflicts, and consequently improves speed performance.
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