Integrated thin film capacitor/inductor/interconnect system and method
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United States of America Patent
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May 10, 2005
Grant Date -
Apr 29, 2004
app pub date -
Oct 15, 2003
filing date -
Sep 21, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).
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