Method of forming integrated circuitry and method of forming shallow trench isolation in a semiconductor substrate

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United States of America Patent

PATENT NO 6897120
SERIAL NO

09920978

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Abstract

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A method of forming integrated circuitry includes forming a silicon nitride comprising layer over a semiconductor substrate. At least a portion of the silicon nitride comprising layer is etched using an etching chemistry comprising ammonia and at least one fluorocarbon. A method of forming shallow trench isolation in a semiconductor substrate includes depositing a silicon nitride comprising layer over a bulk semiconductor substrate. A photoresist comprising masking layer is formed over the silicon nitride comprising layer. The photoresist comprising masking layer is patterned effective to form a plurality of shallow trench mask openings therethrough. The silicon nitride comprising layer is etched through the mask openings substantially selectively relative to the photoresist using an etching chemistry comprising ammonia and at least one fluorocarbon.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Trapp, Shane J Boise, ID 26 244

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