Method and apparatus for defining vias

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6898772
SERIAL NO

10219923

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Abstract

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Some embodiments of the invention provide a method for identifying locations of potential via between two layers of a design layout. The method identifies on one layer a first non-rectangular polygonal region for containing the via, and identifies on the other layer a second non-rectangular polygonal region for containing the via. It then determines whether an intersection of the first and second regions is sufficiently large to contain a via. If the intersection is sufficiently large, the method identifies the intersection of the two regions as a region for containing a via.

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Patent Owner(s)

Patent OwnerAddress
CADENCE DESIGN SYSTEMS INC2655 SEELY AVENUE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Caldwell, Andrew Santa Clara, CA 120 1490
Teig, Steven Menlo Park, CA 333 6577

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