High performance leadframe in electronic package
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United States of America Patent
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Jun 7, 2005
Grant Date -
N/A
app pub date -
Mar 17, 2003
filing date -
Nov 12, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
Systems and techniques to provide a high performance leadframe architecture in electronic packages. An electronic package includes an extended area for wire bonding to provide improved high-current operation. The extended area can be an extended portion of a single lead in a single-layer non-leaded leadframe, where multiple wires are connected between multiple bond pads and the single lead. The extended area can be a support bar of a leadframe that is used as bond area for ground connections in a single-layer non-leaded leadframe. The extended area can be lead regions used for wire bonding voltage output and voltage input using a reduced power dissipation topology.
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