Threshold-based load address prediction and new thread identification in a multithreaded microprocessor
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United States of America Patent
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Jun 14, 2005
Grant Date -
Jul 11, 2002
app pub date -
Jan 11, 2002
filing date -
Jan 11, 2001
priority date (Note) -
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Abstract
A method and apparatus for predicting load addresses and identifying new threads of instructions for execution in a multithreaded processor. A load prediction unit scans an instruction window for load instructions. A load prediction table is searched for an entry corresponding to a detected load instruction. If an entry is found in the table, a load address prediction is made for the load instruction and conveyed to the data cache. If the load address misses in the cache, the data is prefetched. Subsequently, if it is determined that the load prediction was incorrect, a miss counter in the corresponding entry in the load prediction table is incremented. If on a subsequent detection of the load instruction, the miss counter has reached a threshold, the load instruction is predicted to miss. In response to the predicted miss, a new thread of instructions is identified for execution.
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