Locked loop with dual rail regulation
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United States of America Patent
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Jun 28, 2005
Grant Date -
Sep 25, 2003
app pub date -
Mar 22, 2002
filing date -
Mar 22, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An apparatus having a dual rail regulated reference loop. The reference loop includes a delay circuit powered by upper and lower supply voltages to generate a plurality of reference clock signals, and a voltage regulation circuit to adjust the upper and lower supply voltages according to a phase difference between a selected pair of the reference clock signals.
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