Current controlled delay circuit
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United States of America Patent
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Jun 28, 2005
Grant Date -
N/A
app pub date -
Nov 26, 2002
filing date -
Nov 26, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A current controlled delay circuit is disclosed. Two currents of constant sum are generated to control the delay of the circuit. The circuit includes a differential pair to switch one of the two currents from one leg of the circuit to another leg of the circuit. The circuit includes a cross-coupled pair to switch the other of the two currents from one leg of the circuit to another leg of the circuit. The circuit may include a fixed or variable load.
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