Method and apparatus for reconfiguring thread scheduling using a thread scheduler function unit

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United States of America Patent

PATENT NO 6918116
APP PUB NO 20020174166A1
SERIAL NO

09854657

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Abstract

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A method and system for thread scheduling to run in parallel with a main processor, comprising: obtaining parameter values for a plurality of different threads; performing logic functions, in parallel with, but without interrupting the main processor, on said parameter values to determine if thread scheduling should be reconfigured, and if so, which thread should be enabled; and sending an interrupt signal to interrupt the main processor if thread scheduling is to be reconfigured. The parameters may be obtained by monitoring the values from thread processes held in registers with fixed addresses, or by snooping memory traffic for selected parameters. The logic functions, in a preferred embodiment, may be implemented using reconfigurable hardware logic.

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Patent Owner(s)

  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ang, Boon Seong Sunnyvale, CA 34 451

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