Decision feedback equalizer with embedded coherent signal combiner

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United States of America Patent

PATENT NO 6920333
APP PUB NO 20040053588A1
SERIAL NO

10242243

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A receiver in a communication system, for combining various significant components of a multipath fading signal and eliminating all other small components, consists of a signal generator, a plurality of delay devices, a plurality of decision feedback equalizers with embedded coherent signal combiners, a controller, a coherent signal combiner, and a decision circuit. The first decision feedback equalizer receives its inputs signals from a delay device and a signal generator, and each of the rest decision feedback equalizer receives its input signals from a corresponding delay device and the signal generator of its previous decision feedback equalizer. The coherent signal combiner, coupled to the output of the summation circuit of the last decision feedback equalizer, combines all the significant component signals together. The decision circuit makes a decision on transmitted symbol from the output signal of the coherent signal combiner. The controller collects information from various devices and generates control signals for various devices. Each decision feedback equalizer with embedded coherent signal combiner comprises of a feedforward filter, a feedback filter, a summation circuit, a signal generator, and coefficient updating device. The signal generator in each decision feedback equalizer consists of a plurality of information extractors, a plurality of component signal generators, a coherent signal combiner, a decision circuit, and a summation circuit.

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Patent Owner(s)

Patent OwnerAddress
YANG GEORGE LOWINGS MILLS MD

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yang, George L 15 Longfellow Ct., Freehold, NJ 07728 14 390

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