Timing calibration apparatus and method for a memory device signaling system

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United States of America Patent

PATENT NO 6920540
SERIAL NO

10278478

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Abstract

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A memory system includes a memory controller and a memory component coupled to each other. An interface of the memory component is configured to receive a first signal from the memory controller with read request information, retrieve the read data information from the memory core in response to the request information, and transmit to the memory controller a second signal containing the read data information. The read data information includes read data symbols, where the average duration of the read data symbols, measured at the interface, defines a symbol time interval. A first external access time is measured at the interface between a first read request and read data transmitted by the interface in response to the first read request. A second external access time interval is measured at the interface between a second read request and read data transmitted by the interface in response to the second read request. The difference between the first external access time and the second external access time is greater than one-half of the symbol time interval.

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Patent Owner(s)

Patent OwnerAddress
RAMPART ASSET MANAGEMENT LLC5900 BALCONES DRIVE SUITE 100 AUSTIN TX 78731

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hampel, Craig E San Jose, CA 278 7376
Perego, Richard E San Jose, CA 154 4667
Sidiropoulos, Stefanos S Palo Alto, CA 5 242
Tsern, Ely K Los Altos, CA 168 5566
Ware, Fredrick A Los Altos Hills, CA 16 480

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