Semiconductor chip and wiring board with bumps formed on pads/land and on passivation/insulation film and manufacturing method of the same
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United States of America Patent
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-
Aug 2, 2005
Grant Date -
May 1, 2003
app pub date -
Oct 22, 2002
filing date -
Oct 25, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An integrated circuit is electrically connected with a plurality of pads. A passivation film covers a part of each of the pads and exposes the other part of each of the pads. Bumps are formed on the pads, respectively. Each of the bumps is a single layer disposed on a part of each of the pads exposed from the passivation film, and on the passivation film.
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