Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line

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United States of America Patent

PATENT NO 6924686
APP PUB NO 20030234673A1
SERIAL NO

10411853

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Abstract

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A synchronous mirror delay (SMD)includes a model delay line that is coupled to a bi-directional delay line. In operation, an initial edge an input clock signal is applied through the model delay line to the bi-directional delay line. The SMD thereafter operates in a forward delay mode to alternately operate the bi-directional delay line in a forward mode and a backward mode to propagate the initial edge of the input clock signal through the bi-directional delay line and delay the initial edge of the input clock signal by a forward delay. In response to a subsequent edge of the input clock signal, the SMD mirrors the propagation of the input clock signal through the bi-directional delay line during the forward mode and further delay the initial edge of the input clock signal by a backward delay that is substantially equal to the forward delay.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kirsch, Howard C Eagle, ID 98 2224

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