Low voltage differential to single-ended converter
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United States of America Patent
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Aug 9, 2005
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N/A
app pub date -
Oct 7, 2002
filing date -
Apr 16, 2001
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Abstract
Method and circuitry for converting a differential logic signal to a single-ended logic signal eliminate slower PMOS transistors and speed up the conversion process. In specific embodiments differential logic signals of the type employed in, for example, current-controlled complementary metal-oxide-semiconductor (C3MOS) logic are converted to single-ended rail-to-rail CMOS logic levels using a differential pair of NMOS transistors with resistors as load devices and an NMOS current source transistor that provides dynamically adjusted tail current.
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