Synchronous signal producing circuit for controlling a data ready signal indicative of end of access to a shared memory and thereby controlling synchronization between processor and coprocessor
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United States of America Patent
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Aug 9, 2005
Grant Date -
Jan 31, 2002
app pub date -
Jun 6, 2001
filing date -
Jul 25, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A synchronous signal producing circuit includes an access inhibit region register for designating an access inhibit region for a processor in a shared memory, a comparing circuit for detecting the access by the processor to the access inhibit region designated in the access inhibit region register, and a logic circuit for issuing a P_DC signal setting the processor to a wait state based on a coprocessor instruction execution signal and a result of the comparison by the comparing circuit.
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