Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 16, 2005
Grant Date -
N/A
app pub date -
Jun 6, 2002
filing date -
Jun 6, 2002
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully