Ferroelectric memory and electronic apparatus

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6930339
APP PUB NO 20020155666A1
SERIAL NO

10105002

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention relates to a ferroelectric memory having a matrix-type memory cell array which has a superior degree of integration, in which the angularity of the ferroelectric layer's hysteresis curve is improved, the production yield is increased and costs are reduced. A ferroelectric memory having improved angularity in the hysteresis curve, and superior memory characteristics, production yield and costs is realized as follows. Namely, a peripheral circuit chip and a memory cell array chip are engaged onto an inexpensive assembly base 300 such as glass or plastic. In memory cell array chip 200, a ferroelectric layer is made to undergo epitaxial growth on to a Si single crystal via a buffer layer and first signal electrode. As a result, a ferroelectric memory can be realized which has improved angularity in the hysteresis curve and superior memory characteristics, production yield, and cost.

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Patent Owner(s)

  • SEIKO EPSON CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hasegawa, Kazumasa Nagano-ken, JP 35 735
Higuchi, Takamitsu Matsumoto, JP 74 717
Iwashita, Setsuya Nirasaki, JP 70 582
Miyazawa, Hiromu Toyoshina-machi, JP 116 805
Natori, Eiji Chino, JP 79 1026

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