High performance, integrated, MOS-type semiconductor device and related manufacturing process
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United States of America Patent
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Aug 23, 2005
Grant Date -
May 20, 2004
app pub date -
Sep 30, 2003
filing date -
Oct 9, 2002
priority date (Note) -
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Abstract
An LDMOS device includes elementary MOS cells. The gate structure of the elementary cell includes a first conductor material finger. The LDMOS device includes first metal stripes for contacting source regions, second metal stripes for contacting drain regions, and third metal stripes placed on inactive zones for contacting a material finger by forming a contact point. The contact point is formed by a first prolongation of the material finger for connecting with one of the third stripes. The third metal stripe includes at least one fourth metal stripe placed on a separation zone. The material finger has a second prolongation and the fourth metal stripe has a first prolongation to form an additional contact point.
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