Buffer switch having descriptor cache and method thereof
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United States of America Patent
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Sep 6, 2005
Issued Date -
N/A
app pub date -
Apr 28, 2004
filing date -
Jul 26, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A buffer switch comprises a data memory that stores a plurality of data. A cache memory comprises a plurality of FIFO mini-queues each storing a plurality of descriptors each corresponding to a respective one of the plurality of data. An output memory comprises a plurality of output queues. A burst writer simultaneously transfers M ones of the plurality of descriptors stored in a corresponding one of the plurality of mini-queues to at least a corresponding one of the plurality of output queues. The burst writer accesses the output memory, when the output memory is available, once for every M ones of the plurality of descriptors.
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- Non-US Classification not provided for expired patents
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