Addressing scheme supporting variable local addressing and variable global addressing

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6941440
APP PUB NO 20040044806A1
SERIAL NO

10439297

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A node comprises at least one agent and an input/output (I/O) circuit coupled to an interconnect within the node. The I/O circuit is configured to communicate on a global interconnect to which one or more other nodes are coupled during use. Addresses transmitted on the interconnect are in a first local address space of the node, and addresses transmitted on the global interconnect are in a global address space. The first local address space includes at least a first region used to address at least a first resource of the node. The node is programmable, during use, to relocate the first region within the first local address space, whereby a same numerical value in the first local address space and a second local address space corresponding to one of the other nodes coupled to the global interconnect refers to the first resource in the node during use.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED1 YISHUN AVENUE 7 SINGAPORE 768923

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gulati, Manu San Francisco, CA 95 1140
Kelly, James D Scotts Valley, CA 74 1222
Moll, Laurent R Saratoga, CA 38 837
Oner, Koray Sunnyvale, CA 14 275
Rowlands, Joseph B Santa Clara, CA 62 1190

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