Method and apparatus for transitioning a processor state from a first performance mode to a second performance mode
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United States of America Patent
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Sep 6, 2005
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N/A
app pub date -
Sep 30, 2000
filing date -
Sep 30, 2000
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Abstract
A method and an apparatus to dynamically transition a processor between two performance states, high performance and low power. Predetermined core clock frequency and supply voltage levels of the processor define each performance state. Transitioning the supply voltage while the processor is in the active mode and transitioning the frequency while the processor is in the sleep mode significantly reduce the processor latency.
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