Methods of making and using a floating interposer

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United States of America Patent

PATENT NO 6946329
SERIAL NO

10832845

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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A flexible, compliant layer of a single low modulus material for connecting a chip die directly to a circuit card without encapsulation. The flexible compliant layer provides stress relief caused by CTE thermal mismatch in chip die and circuit card. An array of copper plated vias are formed in said compliant layer with each via terminating on opposing surfaces of the layer in copper pads. Rather than copper, other metals, such as gold or nickel, may also be used. An array of holes may be positioned between said array of vias to provide additional resiliency. The plated vias may be angled with respect to said opposing surfaces to allow additional vertical and horizontal stress relief. Connection of the pads on one surface to high melt C-4 solder balls or columns on a chip die results in solder filled vias. Low melt solder connection of the pads on the other surface to a circuit card allows non-destructive rework of the cards.

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Patent Owner(s)

Patent OwnerAddress
GLOBALFOUNDRIES INCMAPLES CORPORATE SERVICES LIMITED PO BOX 309 UGLAND HOUSE GRAND CAYMAN KY1-1104

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pierson, Mark Vincent Binghamton, NY 36 1077
Sweterlitsch, Jennifer Rebecca Vestal, NY 2 26
Woychik, Charles Gerard Vestal, NY 32 1892
Youngs, Jr Thurston Bryce Endicott, NY 8 163

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