Method of forming integrated circuitry, method of forming memory circuitry, and method of forming random access memory circuitry
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United States of America Patent
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Oct 4, 2005
Grant Date -
Feb 6, 2003
app pub date -
Aug 1, 2001
filing date -
Aug 1, 2001
priority date (Note) -
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Abstract
A method of forming memory circuitry sequentially includes forming a plurality of metal interconnect lines over a semiconductive substrate. A plurality of memory cell storage devices comprising voltage or current controlled resistance setable semiconductive material are then formed. In one implementation, a method of forming integrated circuitry includes forming a metal interconnect line over a semiconductive substrate. A device comprising two metal comprising electrodes separated by a voltage or current controlled resistance setable semiconductive material is formed. The resistance setable a semiconductive material is formed after forming the metal interconnect line.
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