Semiconductor package having interconnect with conductive members

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6952054
APP PUB NO 20040188824A1
SERIAL NO

10820674

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An interconnect for semiconductor components such as dice, wafers and chip scale packages is provided. The interconnect includes a substrate, and patterns of contacts formed on a face side of the substrate adapted to electrically engage external contacts (e.g., bond pads, solder bumps) on the components. The interconnect also includes insulated conductive members through the substrate, which provide direct electrical paths from the interconnect contacts to a backside of the substrate. The conductive members can be formed by laser machining openings in the substrate, and then filling the openings with a conductive material (e.g., metal, conductive polymer). The conductive members can also include pads with contact balls, configured for electrical interface with a test apparatus, such as test carrier or wafer handler. The interconnect can be used to construct test systems for testing semiconductor components, or to construct chip scale packages and multi chip modules.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
ROUND ROCK RESEARCH LLC26 DEER CREEK LANE MT KISCO NY 10549

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akram, Salman Boise, ID 801 30978
Farnworth, Warren M Nampa, ID 855 33798
Wood, Alan G Boise, ID 415 23368

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation