Arbiter for an input buffered communication switch

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United States of America Patent

PATENT NO 6954811
APP PUB NO 20040017804A1
SERIAL NO

10199996

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An arbiter for a switch maintains a pair of counters for each flow of traffic at each input port: one counter (also called 'first counter') to indicate an ideal transfer of traffic, and another counter (also called 'second counter') to indicate the actual transfer of traffic. Both counters are incremented when traffic is received by the input port, and the second counter is decremented when a unit of traffic (such as a cell or packet) is about to be transmitted whereas the first counter is decremented in a fractional manner (relative to the unit of traffic) in each period of arbitration, based on available bandwidth. The arbiter selects one of the output ports (also called 'winning output port') of the switch, based at least partially on values of the two counters for each flow from the input port to one of the output ports, and generates a signal to approve transfer of traffic from the input port to the winning output port. In several embodiments, the above-described flow can be for either high priority traffic or for low priority traffic, and any bandwidth leftover from transferring high priority traffic is used in transferring low priority traffic. Specifically, the arbiter maintains additional counters for each port indicative of total bandwidth being used, and the additional counters are used to allocate leftover bandwidth in an iterative manner, until a flow from an input port to an output port is saturated, at which time the saturated flow is removed from iteration.

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Patent Owner(s)

  • CALIX, INC.;WHITE OAK GLOBAL ADVISORS, LLC

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Vishnu, Meenaradchagan Petaluma, CA 4 52

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