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Abstract

A test mark, as well as methods for forming and using the test mark to facilitate the measurement of the critical dimensions of etched features in semiconductor and other wafer level processing is described. The test marks may be used to characterize, calibrate and/or monitor etch performance. Test marks are defined by imaging (typically at partial exposures) overlapping, angularly offset lines in a resist that covers a layer to be etched. The lines preferably have line widths that are equal (or related) to a critical dimension of interest. After the resist is developed and otherwise processed, the layer is etched as appropriate, thereby creating the test marks. The test marks are then imaged to facilitate the determination of a geometric parameter of each mark. Most commonly, the geometric parameter determined relates to the area of the mark and/or the length of its major dimension. These parameters can then be used to approximate a critical dimension of interest based at least in part on the determined geometric parameter of the test mark.

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First Claim