Bit line control and sense amplification for TCCT-based memory cells
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United States of America Patent
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Oct 25, 2005
Issued Date -
N/A
app pub date -
Jul 30, 2002
filing date -
Jul 5, 2002
priority date (Note) -
Expired
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Abstract
A circuit and a method are provided for facilitating control of bit lines in preparation for, or during, sense amplification of data signals from thinly capacitively-coupled thyristor ('TCCT')-based memory cells. In accordance with a specific embodiment, a circuit and method are designed, among other things, to effectively minimize power consumption by memory cells and to increase speed and reliability of sense amplification. In another specific embodiment, the circuit and method are directed to TCCT-based memory cells.
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