Method for analyzing in-line QC test parameters

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United States of America Patent

PATENT NO 6959252
APP PUB NO 20050004773A1
SERIAL NO

10604244

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Abstract

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A method for analyzing in-line QCtest parameters is used to analyze a plurality of lots of products, each lot of products having a lot number and being formed using a plurality of equipments. At least one wafer of each lot of products is tested by at least one in-line QC test item to generate an in-line QC test parameter. The in-line QC test item, a sample test item and a wafer test item related to the in-line QC test item are stored in a database. The database further stores the in-line QC test parameter and data of a plurality of lots of high-yield product stocks, such as various test items and test parameters. The method includes the following steps: analyzing the in-line QC test parameter to determine whether the in-line QC test parameter corresponds to a predetermined spec or not; searching the database to find out the sample test item or the wafer test item related to the in-line QC test item when the in-line QC test parameter does not correspond to the predetermined spec; searching the database to find out the corresponding test parameters of the high-yield product stocks according to the in-line QC test item and the searched sample test item or the wafer test item; and generating a correlation to illustrate the relationship between the in-line QC test item and the sample test item, or the relationship between the in-line QC test item and the wafer test item according to the searched high-yield product stocks.

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Patent Owner(s)

Patent OwnerAddress
POWERCHIP SEMICONDUCTOR CORPNO 12 LI-HSIN RD 1 SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU ROC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Luo, Haw-Jyue Hsin-Chu, TW 5 38
Tai, Hung-En Taipei Hsien, TW 13 65

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