DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules
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United States of America Patent
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Nov 29, 2005
Grant Date -
Sep 26, 2002
app pub date -
Feb 14, 2002
filing date -
Feb 14, 2001
priority date (Note) -
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Abstract
A memory module is described which, externally, has the functionality of DDR SDRAMs and contains two groups of conventional SDRAMs. A conversion device provides for the conversion of clock signals, commands, and data. The conversion device contains a changeover switch, a delay locked loop and buffer memory for addresses and commands and also for the data, which are driven in a suitable manner by the delay locked loop.
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