Programmable interactive verification agent
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United States of America Patent
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Dec 6, 2005
Grant Date -
N/A
app pub date -
May 22, 2002
filing date -
May 22, 2002
priority date (Note) -
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Abstract
A verification agent can be used to verify hard and/or soft modules under test in an integrated circuit. The integrated circuit contains a processor and memory for storing code executable by the processor. The module under test performs predetermined operations. The verification agent interacts with the module under test, including sending signals to the module under test and generating results based on the interaction. The code causes the processor to receive the results and compare the results with expected values. The module under test may be deemed to operate properly if the actual results match the expected values.
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