Method and system for forming dual gate structures in a nonvolatile memory using a protective layer
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United States of America Patent
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Dec 13, 2005
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N/A
app pub date -
Dec 27, 2001
filing date -
Dec 27, 2001
priority date (Note) -
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Abstract
A method and system for providing a semiconductor device is described. The semiconductor includes a core and a periphery. The method and system include providing a plurality of core gate stacks in the core, a plurality of sources in the core and a plurality of periphery gate stacks in the periphery. Each of the plurality of core gate stacks includes a first polysilicon gate and a WSi layer above the first polysilicon gate. The plurality of sources resides between a portion of the plurality of core gate stacks. Each of the plurality of periphery gate stacks includes a second polysilicon gate and a CoSi layer on the second polysilicon gate.
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