Method and system for controlling default values of flip-flops in PGA/ASIC-based designs
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United States of America Patent
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Dec 13, 2005
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N/A
app pub date -
Feb 22, 2002
filing date -
Feb 22, 2002
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Abstract
During a reset condition or prior to system initialization of an FPGA-based system (100), a FPGA (102) can be pre-configured by loading a value from a memory cell (108) into at least one flip-flop (312) of the FPGA, which represents a configuration register for an FPGA memory controller (106). The FPGA memory controller can be configured using the value loaded in the flip-flop. The value loaded into the flip-flop from the memory cell can be a default value previously stored in the memory cell.
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