Semiconductor memory device and control method and manufacturing method thereof

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United States of America Patent

PATENT NO 6979856
APP PUB NO 20040071011A1
SERIAL NO

10648295

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Abstract

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A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film. The first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines. The second diffusion region is connected to a program and erase bit line.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hamajima, Tomohiro Kanagawa, JP 14 242
Ishige, Kiyokazu Kanagawa, JP 15 59
Kawai, Shinichi Kanagawa, JP 30 379
Nishizaka, Teiichiro Kanagawa, JP 12 136
Sakai, Isami Kanagawa, JP 11 147
Tanaka, Motoko Kanagawa, JP 5 54
Yoshino, Akira Kanagawa, JP 99 1454

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