Digital signal processor system having programmable random access memory that executes processing during downloading of a program
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United States of America Patent
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Dec 27, 2005
Grant Date -
Aug 14, 2003
app pub date -
Sep 24, 2002
filing date -
Feb 12, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A digital signal processor includes a programmable memory, a processor and an access controller. The programmable memory has blocks each of which is capable of reading and writing an instruction of a program. The processor sequentially executes the instruction stored in the programmable memory. The access controller sequentially stores the instruction of the program in the blocks of the programmable memory on the basis of an address indicating a location of the respective blocks where the instruction is stored. The access controller controls an access of the processor to the respective blocks.
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