Wafer probing that conditions devices for flip-chip bonding

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6984996
APP PUB NO 20040217767A1
SERIAL NO

10428572

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A probing system or process for electrical testing of a device fabricated on a wafer also conditions terminals such as solder balls on the device to improve uniformity of the heights of the terminals and improve the reliability of connections to an interconnect substrate in a flip-chip package or to a printed circuit board in a chip-on-board application. The system can employ a probe card that is a printed circuit board and/or is substantially identical to interconnect substrates used in flip-chip packaging. The probe card can be replaceable on a test head to allow for quick changes the reduce ATE downtime and to accommodate device changes such as a die shrink. Probe tips on the probe card can be the contact pads or bumps that are the normal electrical contact structures of the interconnect substrates.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
NOVELLUS DEVELOPMENT COMPANY LLC4000 N 1ST STREET SAN JOSE CA 95134

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DiOrio, Mark L Cupertino, CA 10 170
Hilton, Robert M Queensland, AU 12 127

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation