Programmable address generator
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United States of America Patent
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Jan 10, 2006
Grant Date -
Sep 9, 2004
app pub date -
Dec 17, 2003
filing date -
Dec 17, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A programmable address generator comprising at least one input for receiving a first digital address of a data word in a first memory, to be converted into a second digital address of this same data word in a second memory, or conversely, comprising: at least two hierarchically interleaved counters, that can be individually parameterized for their initial offset, their increment value, and their maximum count; at least one programming register containing said parameters of each counter, these parameters depending on the addressing conversion function to be performed; and an adder of the first address with the counter results, said adder providing said second address.
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