Power failure detection and response
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United States of America Patent
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Jan 17, 2006
Grant Date -
Jun 3, 2004
app pub date -
Dec 3, 2002
filing date -
Dec 3, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer system comprising a personal computer assembly (motherboard), memory for storing data, means for detecting loss of applied power, and means responsive to the detecting means for inhibiting data transfers by the processor of the personal computer and the memory. In accordance with the invention, memory comprises non-volatile memory and the inhibiting means applies a signal to the memory to inhibit data transfer operations of the memory. The means for detecting loss of applied power detects loss at a power mains connection of a power supply for supplying operating power to the personal computer assembly. A machine control comprises a computer system according to the invention.
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